DSA Studio

Virtual Memory Professional Checkpoint

ASIDs, invalidation, working sets, COW invariants, and capstone design.

Get every question correct to pass this checkpoint. You can review feedback, revise your answers, and submit again.

1. Tagged TLB capacity is 2. PID 1 and PID 2 both map VPN 4 to different frames. Access PID1/VPN4, PID2/VPN4, then PID1/VPN4. Starting empty, what are the hit and miss counts?

Select one answer.

2. PID 1 remaps a cached VPN while PID 2 has a cached entry for that same VPN. What should local invalidation remove?

Select one answer.

3. One physical page is shared after a fork. The child writes once, then the parent writes that same virtual page. How many copies are needed?

Select one answer.

4. For a working-set window of 4, the last four accesses are [6,2,6,6]. What is the working-set size?
Join Discord